U635H64
PowerStore 8K x 8 nvSRAM
Features Packages:PDIP28 (300 mil) Transfers from the EEPROM to the
PDIP28 (600 mil)
SRAM (the RECALL operation) take
SOP28 (330 mil) High-performance CMOS non- place automatically  on power up.
volatile static RAM 8192 x 8 bits The  U635H64  combines  the  high 25, 35 and 45 ns Access Times Description performance and ease of use of a 12, 20 and 25 ns Output Enable  fast SRAM with  nonvolatile  data
Access Times The  U635H64  has  two  separate integrity. I  = 15 mA at 200 ns Cycle STORE cycles also may be initiated
CC modes of operation: SRAM mode
Time and  nonvolatile  mode.  In  SRAM under user  control via a software Automatic STORE to EEPROM mode, the memory operates as an sequence.
on Power Down using system  ordinary static RAM. In nonvolatile Once a  STORE  cycle  is  initiated,
capacitance operation,  data  is  transferred  in further input or output are disabled Software initiated STORE  parallel from SRAM to EEPROM or until the cycle is completed.
(STORE Cycle Time < 10 ms) from EEPROM  to SRAM.  In  this Because a sequence of addresses Automatic STORE Timing mode SRAM functions are disab- is  used  for  STORE  initiation,  it  is
5 10  STORE cycles to EEPROM led. important that no other read or write 10 years data retention in  The U635H64 is a fast static RAM accesses intervene in the sequence
EEPROM  (25, 35, 45 ns), with a nonvolatile or the sequence will be aborted. Automatic RECALL on Power Up electrically  erasable PROM RECALL cycles may also be initia- Software RECALL Initiation (EEPROM)  element  incorporated ted by a software sequence.
(RECALL Cycle Time < 20 μs) in  each  static memory  cell.  The Internally, RECALL is a  two  step Unlimited RECALL cycles from SRAM can be read and written an procedure. First, the SRAM data is
EEPROM unlimited  number of times,  while cleared and second, the nonvolatile Single 5 V ± 10 % Operation independent nonvolatile data resi- information  is transferred into  the Operating temperature ranges:  des  in EEPROM.  Data  transfers SRAM cells.
0 to 70 C The RECALL operation in no way
°   from  the  SRAM  to  the EEPROM
 -40 to 85 °C alters  the  data  in  the  EEPROM
  (the STORE operation) take place CECC 90000 Quality Standard automatically  upon  power  down cells. The nonvolatile data can be ESD characterization according- using  charge stored  in  system recalled an  unlimited number  of
MIL STD 883C M3015.7-HBM capacitance.  times.
(classification see IC Code
Numbers)